The present invention relates to a semiconductor circuit arrangement of the type including a substrate having at least one integrated circuit disposed at a major surface of the substrate and a plurality of electrical conductor paths disposed on the major surface for providing electrical connections to the integrated circuit.
Integrated semiconductor circuits are composed of a (semiconductor) substrate, e.g. wafer-shaped, monocrystalline silicon, having a thickness of about 0.3 mm. A semiconductor circuit arrangement, composed, for example, of transistors and diodes, is formed on one surface side of the substrate in presently customary semiconductor technology, e.g. in the bipolar or CMOS (complementary metal oxide semiconductor) technology. On this semiconductor circuit arrangement, there is disposed a conductor path layer composed, for example, of aluminum conductor paths. The conductor path layer serves to electrically connect the exemplary mentioned transistors and/or diodes. Such an arrangement is also referred to as an integrated circuit (IC).
Complex circuit arrangements, such as, for example, signal processors or computers, are generally composed of a larger number of such integrated circuits. These integrated circuits are fastened, for example by gluing and/or soldering, to cards composed, for example, of ceramic or a semiconductor material, e.g. silicon. Electrical connections are established between the integrated circuits via electrical conductor paths disposed on the card. In a conventional manner, these cards are then pushed into a housing and are connected with one another via further electrical conductor paths in the rear wall of the housing.
The then required number of electrical connecting lines may be extremely large. For example, a signal processor may contain more than 100 integrated circuits which require many thousands of electrical connecting lines. The clock pulse rates of present-day circuits lie typically at 20 MHz. To produce faster signal processors, clock pulse rates of more than 100 MHz are required. However, with increasing clock pulse rates, the danger of annoying electrical crosstalk arises between parallel or intersecting lines. Thus the probability of a bit error increases.